Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
70 VLSI Test Principles and Architectures that RAS design achieves significant reduction in test power dissipation, as well as a good reduction in test data volume and test application time. As test power and delay fault testing are becoming crucial issues in nanometer designs, the RAS approach represents a promising alternative to serial scan design and thus deserves further research. 2.6 SCAN DESIGN RULES In order to implement scan into a design, the design must comply with a set of scan design rules [Cheung 1996]. In addition, a set of design styles must be avoided, as they may limit the fault coverage that can be achieved. A number of scan design rules that are required to successfully utilize scan and achieve the target fault coverage goal are listed in Table 2.7. In this table, a possible solution is recommended for each scan design rule violation. Scan design rules that are labeled “avoid” must be fixed throughout the shift and capture operations. Scan design rules that are labeled “avoid during shift” must be fixed only during the
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: shift operation. Detailed descriptions are provided for some critical scan design rules. TABLE 2.7 ± Typical Scan Design Rules Design Style Scan Design Rule Recommended Solution Tristate buses Avoid during shift Fix bus contention during shift Bidirectional I/O ports Avoid during shift Force to input or output mode during shift Gated clocks (muxed-D full-scan) Avoid during shift Enable clocks during shift Derived clocks (muxed-D full-scan) Avoid Bypass clocks Combinational feedback loops Avoid Break the loops Asynchronous set/reset signals Avoid Use external pins Clocks driving data Avoid Block clocks to the data portion Floating buses Avoid Add bus keepers Floating inputs Not recommended Tie to V DD or ground Cross-coupled NAND/NOR gates Not recommended Use standard cells Non-scan storage elements Not recommended for full-scan design Initialize to known states, bypass, or make transparent...
View Full Document

This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

Ask a homework question - tutors are online