116_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

116_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Design for Testability 85 2.7.4.1 Verifying the Scan Shift Operation Verifying the scan shift operation involves performing flush tests using a full- timing logic simulator during the shift operation. A flush test is a shift test where a selected flush pattern is shifted all the way through the scan chains in order to verify that the same flush pattern arrives at the end of the scan chains at the correct clock cycle. For example, a scan chain containing 1000 scan cells requires 1000 shift cycles to be applied to the scan chain for the selected flush pattern to begin arriving at the scan output. If the data arrive early by a number of shift cycles, this may indicate that a similar number of hold time problems exist in the circuit. To detect clock skew problems between adjacent scan cells, the selected flush pattern is typically a pattern that is capable of providing both 0-to-1 and 1-to-0 transitions to each scan cell. In order to ensure that a 0-to-0 or 1-to-1 transi- tion of a scan cell does not corrupt the data, the selected flush pattern is further
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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