121_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

121_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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90 VLSI Test Principles and Architectures observability at nonstorage circuit nodes can be dramatically improved. Hence, the scan-set technique can significantly improve the circuit’s diagnostic resolution and silicon debug capability. These advantages have made the approach attractive to high-performance and high-complexity designs [Kuppuswamy 2004], despite the increased area overhead. The technique has also been extended to the LSSD architecture [DasGupta 1981]. 2.8.3 Error-Resilient Scan Soft errors are transient single-event upsets (SEUs) caused by various types of radiation. Cosmic radiation has long been regarded as the major source of soft errors, especially in memories [May 1979], and chips used in space applications typically use parity or error-correcting code (ECC) for soft error protection. As circuit features begin to shrink into the nanometer ranges, error-causing activa- tion energies are reduced. As a result, terrestrial radiation, such as alpha particles
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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