CHAPTER 3LOGIC ANDFAULTSIMULATIONJiun-Lang HuangNational Taiwan University, Taipei, TaiwanJames C.-M. LiNational Taiwan University, Taipei, TaiwanDuncan M. (Hank) WalkerTexas A&M University, College Station, TexasABOUT THIS CHAPTERSimulation is a powerful set of techniques that are used heavily in digital circuitverification, test development, design debug, and diagnosis. During the design stage,logic simulation is performed to help verify whether the design meets its speci-fications and contains any design errors. It also helps locate these design errorsthat escape to fabrication during design debug. In test development, faulty circuitbehavior is simulated with a set of test patterns to assess the pattern quality andguide further pattern development. Simulation of faulty circuits is referred to asfault simulation and is also used during fault diagnosis, where test results are usedto locate manufacturing defects within the hardware.
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Ma Ying-jeou, fault simulation, Huang National Taiwan University