143_pdfsam_VLSI TEST PRINCIPLES &amp; ARCHITECTURES

# 143_pdfsam_VLSI TEST PRINCIPLES &amp; ARCHITECTURES -...

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112 VLSI Test Principles and Architectures TABLE 3.1 ± Basic Boolean Operations for Ternary Logic AND 01 u OR u NOT u 0 000 0 u 10 u 1 u 1 111 u 0 uu u u 1 u The input/output relationships of the three basic Boolean operations using ternary logic are summarized in Table 3.1. From Table 3.1, one can observe that for an AND operation, the output is determined if one of the inputs is 0. Thus, we say that 0 is the controlling value of the AND operation. Similarly, 1 is the controlling value of an OR operation. Simulation based on ternary logic is pessimistic; it may report that a signal is unknown when in fact its value can be uniquely determined as 0 or 1 [Breuer 1972]. To illustrate the information loss caused by ternary logic, the example circuit N is redrawn in Figure 3.5. Let the input vector be
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## This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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