157_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

157_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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126 VLSI Test Principles and Architectures start end evaluate next gate g from Q output change? put g s fanout gates in Q no no no yes yes yes Q empty read in initial condition next vector? read in new input vector put active PIs fanout gates in Q ± FIGURE 3.16 Zero-delay event-driven simulation. or simply unknown, are read in and assigned. Then, a new input vector is loaded and the primary inputs at which events occur (called active PIs) are identified. To propagate the events toward primary outputs, gates driven by active primary inputs are put in the event queue Q , which stores the gates to be evaluated. As long as Q is not empty, a gate g is popped from Q and evaluated. If the output of g changes ( i±e± , a new event occurs), the fanout gates of g are placed in Q . When Q becomes empty, the simulation for the current input vector is finished, and the simulator proceeds to process the next input vector. Doing only the necessary work, event-driven simulation is more efficient than
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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