Logic and Fault Simulation133terms “test vectors” and “test patterns” are interchangeable in most cases, for thesubject of logic simulation the term “test vectors” is preferred, because test vectorsare mostly written by human designers for design verification. For fault simulation,on the other hand, the term “test patterns” is used, as the fault simulators frequentlywork with ATPG to grade test patterns.3.4.1Serial Fault SimulationSerial fault simulation is the simplest fault simulation technique. It consists of fault-free and faulty circuit simulations. Initially, fault-free logic simulation is performedon the original circuit to obtain the fault-free output responses. The fault-freeresponses are stored and later employed to determine whether a test pattern candetect a fault or not. After fault-free simulation, a serial fault simulator simulatesfaults one at a time. For each fault,fault injectionis first performed, which mod-ifies the original circuit to mimic the circuit behavior in the presence of the fault.
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