177_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

177_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES - 146...

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146 VLSI Test Principles and Architectures start end end F collapsed fault list no no no yes yes yes next pattern? more events? apply next pattern delete detected faults from F F empty? 1. analyze events at gate inputs 2. execute events 3. compute events at gate outputs ± FIGURE 3.33 Concurrent fault simulation flowchart. a bad gate diverges or converges depends on three factors: the visibility, the bad event, and the concurrent fault list (see [Abramovici 1994] for more details). After the event execution, new events are computed at the gate output. If an event reaches the primary outputs, detected faults can be removed from concurrent fault lists of all gates. This process repeats until there are no more test patterns or no undetected
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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