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181_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

181_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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150 VLSI Test Principles and Architectures to predict prior to simulation. Concurrent fault simulation has even more severe memory problems than deductive fault simulation because the concurrent fault list is larger than the deductive fault list. Furthermore, the I/O values of every bad gate in concurrent fault simulation must be recorded. Differential fault simulation relieves the memory management problem of concurrent fault simulation because only the difference in flip-flips is stored. When the unknown ( X ) or high-impedance ( Z ) values are present in the circuit, multivalued fault simulation becomes necessary. Serial fault simulation has no problem in handling multivalued fault simulation because it can be realized with a regular logic simulator. In contrast, to exploit bitwise word parallelism, it is more difficult for parallel fault simulation or PPSFP to handle X or Z. Deductive fault simulation, as mentioned earlier, becomes awkward in the presence of X and Z . In concurrent fault simulation, dealing with multivalued simulations is
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