CHAPTER 4TESTGENERATIONMichael S. HsiaoVirginia Tech, Blacksburg, VirginiaABOUT THIS CHAPTERTest generation is the task of producing an effective set of vectors that will achievehigh fault coverage for a specified fault model. While much progress has been madeover the years inautomatic test pattern generation(ATPG), this problem remainsan extremely difficult one. Without powerful ATPGs, chips will increasingly dependondesign for testability(DFT) techniques to alleviate the high cost of generatingvectors. This chapter deals with the fundamental issues behind the design of anATPG, as well as the underlying learning mechanisms that can improve the overallperformance of ATPG.This chapter is organized as follows. First, an overview of the problem of testgeneration is given, followed by random test generation. Next, deterministic algo-rithms for test generation for stuck-at faults are explained, including techniques thatenhance the deterministic engines such as static and dynamic learning. Simulation-
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