193_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

193_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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162 VLSI Test Principles and Architectures Generate a vector that can produce a logic 1 Inputs Outputs Defect-free Defective : Defect ± FIGURE 4.1 Conceptual view of test generation. As this problem is extremely difficult, design for testability (DFT) methods have been frequently used to relieve the burden on the ATPG. In this sense, a powerful ATPG can be regarded as the holy grail in testing, with which all DFT methods could potentially be eliminated. In other words, if the ATPG engine is capable of delivering high-quality test patterns that achieve high fault coverages and small test sets, DFT would no longer be necessary. This chapter thus deals with the algorithms and inner workings of an automatic test pattern generator. Both the underlying theory and the implementation details are covered. As it is difficult and unrealistic to generate vectors targeting all possible defects that could potentially occur during the manufacturing process, automatic test gen- erators operate on an abstract representation of defects referred to as
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Unformatted text preview: faults . The single stuck-at fault model is one of the most popular fault models and is discussed first in this chapter, followed by discussion of test generation for other fault models. In addition, only a single fault is assumed to be present in the circuit to simplify the test generation problem. Consider the single stuck-at fault model: Any fault simply denotes that a circuit node is tied to logic 1 or logic 0. Figure 4.2 shows a circuit with a single stuck-at fault in which signal d is tied to logic 0 ±d/ ² . A logic 1 must be applied from the primary inputs of the circuit to node d if there is to be a difference between the fault-free (or good) circuit and the circuit with the stuck-at fault present. Next, in order to observe the effect of the fault, a logic 0 must be applied to signal c so if a e c b stuck-at 1 d ± FIGURE 4.2 Example of a single stuck-at fault....
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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