Test Generation163the faultd/0 is present it can be detected at the outpute. Test generation attemptsto generate test vectors for every possible fault in the circuit. In this example, inaddition to thed/0 fault, faults such asa/1b/1c/0, etc. are also targeted by the testgenerator. As some of the fault in the circuit can be logically equivalent, no test canbe obtained to distinguish between them. Thus, equivalent fault collapsing is oftenused to identify equivalent faultsa prioriin order to reduce the number of faults thatmust be targeted [Abramovici 1994] [Bushnell 2000] [Jha 2003]. Subsequently, theATPG is only concerned with generating test vectors for each fault in the collapsedfault list.4.2RANDOM TEST GENERATIONRandom test generation(RTG) is one of the simplest methods for generatingvectors. Vectors are randomly generated and fault-simulated (or fault-graded) onthecircuit under test(CUT). Because no specific fault is targeted, the complexityof RTG is low. However, the disadvantages of RTG are that the test set size may
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