197_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

197_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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166 VLSI Test Principles and Architectures 4.2.1 Exhaustive Testing If the combinational circuit has few primary inputs, exhaustive testing may be a viable option, where every possible input vector is enumerated. This may be superior to random test generation as RTG can produce duplicated vectors and may miss certain ones. In circuits where the number of primary inputs is large, exhaustive testing becomes prohibitive. However, based on the results of Lemma I, it may be possible to partition the circuit and only exhaust the input vectors within each cone for each primary output. This is called pseudo-exhaustive testing . In doing so, the number of input vectors can be drastically reduced. When enumerating the input vectors for a given primary output cone, the values for the primary inputs that are outside the cone are simply assigned random values. Therefore, if a circuit has three primary outputs, each of which has a corresponding primary output cone. Note that these three primary output cones may overlap. Let n 1 ±n 2 , and n 3 be the number of primary inputs corresponding to these three cones. Then the number of
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Unformatted text preview: pseudo-exhaustive vectors is simply at most 2 n 1 + 2 n 2 + 2 n 3 . 4.3 THEORETICAL BACKGROUND: BOOLEAN DIFFERENCE Consider the circuit shown in Figure 4.5. Let the target fault be the stuck-at-0 fault on primary input y . Recall the high-level concept of test generation illustrated in Figure 4.1, where the objective is to distinguish the fault-free circuit from the faulty circuit. In the example circuit shown in Figure 4.5, the faulty circuit is the circuit with y stuck at 0. Note that the circuit output can be expressed as a Boolean formula: f = xy + yz Let f ± be the faulty circuit with the fault y/ 0 present. In other words, f ± = f²y = ³´ In order to distinguish the faulty circuit f ± from the fault-free counterpart f , any input vector that can make f ⊕ f ± = 1 would suffice. Furthermore, as the aim is test y f w x z ± FIGURE 4.5 Example circuit to illustrate the concept of Boolean difference....
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