170VLSI Test Principles and ArchitecturesTABLE 4.2±OR OperationOR01DDX001DDX111111DD1D1XDD11DXXX1XXXTABLE 4.3±NOT OperationNOT0110DDDDXXAlgorithm 1Naive ATPG±C²f ³1:whilea fault-effect offhas not propagated to a PO and all possible vector combinations havenot been trieddo2:pick a vector,v, that has not been tried;3:fault simulatevon the circuitCwith faultf;4:end whileNote that in an ATPG, the worst-case computational complexity is exponential, asall possible input patterns may have to be tried before a vector is found or that thefault is determined to be undetectable. One may go about line #2 of the algorithm inan intelligent fashion, so a vector is not simply selected indiscriminately. Whetheror not intelligence is incorporated, some mechanism is needed to account for those
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