211_pdfsam_VLSI TEST PRINCIPLES &amp; ARCHITECTURES

# 211_pdfsam_VLSI TEST PRINCIPLES &amp; ARCHITECTURES -...

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Unformatted text preview: 180 VLSI Test Principles and Architectures Algorithm 6 D-Alg-Recursion C 1: 2: 3: 4: 5: 6: 7: 8: 9: 10: 11: 12: 13: 14: 15: 16: 17: 18: 19: 20: 21: 22: 23: 24: 25: 26: 27: 28: 29: 30: if there is a conflict in any assignment or D-frontier is then return failure; end if /* first propagate the fault-effect to a PO */ if no fault-effect has reached a PO then while not all gates in D-frontier has been tried do g = a gate in D-frontier that has not been tried; set all unassigned inputs of g to non-controlling value and add them to the J-frontier; result = D-Alg-Recursion C ; if result == success then return (success); end if end while return (failure); end if fault-effect has reached at least one PO if J-frontier is then return (success); end if g = a gate in J-frontier; while g has not been justified do j = an unassigned input of g; set j = 1 and insert j = 1 to J-frontier; result = D-Alg-Recursion C ; if result == success then return (success); else try the other assignment set j = 0; end if end while return(failure); a 1 b 0 FIGURE 4.15 Conflict in the justification process. well as other ATPG algorithms). The implications of these procedures are discussed later in this chapter. Consider the multiplexer circuit shown in Figure 4.10. If the target fault is f stuck-at-0, then, after initializing all gate values to x, the D algorithm places a D on ...
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