222_pdfsam_VLSI TEST PRINCIPLES &amp; ARCHITECTURES

# 222_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES - Test...

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Unformatted text preview: Test Generation 191 for each of its unspecified inputs. In this case, impl a = 1 and impl b = 1 are first computed. The implications of f = 1 are logic simulated together with each of d ’s unspecified input’s implication sets in turn, creating a set of newly found logic assignments for each input of the chosen unjustified gate. For this example, when the implications of a = 1 and f = 1 are simulated, the new assignments set a found include w 0 0 and z 0 0 . Similarly, for the combined implication set of b = 1 and f = 1 , the new assignments set b found include y 0 0 and z 0 0 . All logic assignments that are not already in Impl f = 1 which are common to set a and set b are the extended backward implications. These new implications are added as new edges to the original node f = 1. In this running example, because z 0 0 is common in set a and set b , it is a new implication. The corresponding new implication graph is illustrated in Figure 4.25, where the new implication is shown as agraph is illustrated in Figure 4....
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## This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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