226_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

226_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Test Generation 195 Time frame 0 Time frame 1 Time frame – k Time frame j FF’s FE FE FE 1 0 1/0 s-a-0 1 FE PRIMARY INPUTS PRIMARY OUTPUTS ± FIGURE 4.30 An ILA model. the search, a combinational vector is derived, where the input vector consists of primary inputs and pseudo primary inputs. The fault-effect for the target fault may be sensitized to either a primary output of the time frame or a pseudo primary output. If at least one pseudo primary input has been specified, then the search must attempt to justify the needed flip-flop values in time frame 1. Similarly, if fault-effects only propagate to pseudo primary outputs, the ATPG must try to propagate the fault-effects across time frame + 1. Note that this results in a test sequence of vectors. As opposed to combinational circuits, where a single vector is sufficient to detect a detectable fault, in sequential circuits a test sequence is often needed. One question naturally arises: Should the ATPG first attempt the fault excitation
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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