234_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

234_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Test Generation 203 4.6.1 Multiple-Line Conflict Analysis The application of logic implications to quickly identifying untestable faults is evident from the previous example. However, it is restricted to single-line conflicts. The application of logic implications to the identification of untestable faults can be taken to the next level, where impossible value combinations on multiple signals in the circuit are used as conflicting scenarios. These impossible value combinations are then used to identify untestable faults. Finding trivial conflicting value assignments from the implication graph is easy, but it will not help to find more untestable faults because the single-line con- flict approach has already taken these conflicts into account. For instance, if the implication set impl [ x ,0] includes [ y ,1], then the pair ±²x³ 0 ´³²y³ 0 ´µ naturally forms a conflicting value assignment. However, in the original FIRE algorithm, if Set 0 and Set 1 have been computed to be the faults that require x = 0 and
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