236_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

236_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Test Generation 205 Algorithm 11 MaxLocalConflicts() 1: construct implication graph (learn any additional implications via extended backward impl, etc.); 2: for each line l in circuit do 3: identify all untestable faults using the single-line-conflict FIRE algorithm; 4: end for 5: /* maximizing impossibilities algorithm */ 6: for for each gate g in circuit do 7: SIV = set of impossible value combinations not yet covered for gate g ; 8: i = 0; 9: for each value assignment ±a = in SIV do 10: set i = faults requiring a = v to be detectable; 11: i = i + 1; 12: end for 13: untestable_faults = untestable_faults ± i set i ² ; 14: end for z h g f b a c d e ± FIGURE 4.37 Circuit to illustrate multi-node impossible combination. Now, it is interesting to note from Figure 4.37 that the value combination ±² d =0 , e = 0 ³´²f = 1 ´c = 1 ³´z = 0 µ also forms a conflicting value assignment. In addition, because Impl¶f´ 0 ´ 0 · Impl¶h´ 0 ´ 0 · and Impl¶c´ 0 ´ 0 · impl¶h´ 0 ´ 0 · , the set of faults untestable due to f = 0 and c = 0 could potentially be greater than that due to h = 0. Similarly, the set of faults that can be identified as untestable due to d = 1 and e =
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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