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251_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

251_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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220 VLSI Test Principles and Architectures fault-free machine is possible using binary decision diagrams instead of GAs, as has been done in [Park 1995] for the purpose of test generation. However, no pruning of sequences was performed, and no procedure for modifying the sequences was available to handle faulty circuits. Despite the high coverages achieved by DIGATE, for some faults that were not activated to any flip-flop, seeding of distinguishing sequences would not be useful. These faults are those difficult-to-activate faults. They require specific states and justification sequences to arrive at those states in order for the faults to be excited and propagated to one or more flip-flops. For a number of circuits, previous GA- based methods, including DIGATE, achieved low fault coverages due to the lack of specific state justification successes with regard to exciting the difficult-to-activate faults. The difference in fault coverages for some of these circuits was up to 30%.
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