259_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

259_pdfsam_VLSI - 228 VLSI Test Principles and Architectures at time frame 0 now become the target state to be justified The GA is invoked at this

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228 VLSI Test Principles and Architectures at time frame 0 now become the target state to be justified. The GA is invoked at this time to generate a justification sequence for the target state. If a sequence is found that justifies the target state, then this sequence is concatenated with the vectors derived for fault excitation and propagation, and the complete test sequence is added to the test set. Faults that are detected by this sequence are removed from the fault-list. On the other hand, if a justification sequence cannot be found by the GA, then backtracks are made in the fault propagation phase in the deterministic test generator, and attempts are made to justify any new state. In the state justification phase, the GA evolves over four full generations for each target state. Each individual in the population represents a candidate sequence of vectors. A small population size of 64 is used, and the number of generations is limited to four to reduce the execution time. The population size is doubled and
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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