277_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

277_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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246 VLSI Test Principles and Architectures 4.11 OTHER TOPICS IN TEST GENERATION 4.11.1 Test Set Compaction The vectors generated by any ATPG may include too many vectors. In other words, it may be possible to reduce the length of the test set without compromising on the fault coverage. Test compaction can be performed either statically or dynamically. Static compaction attempts to combine and remove certain vectors after the test set has been generated by an ATPG. Dynamic compaction, on the other hand, is integrated within the ATPG, in which the ATPG tries to generate vectors such that each vector detects as many faults as possible [Pomeranz 1991] [Rudnick 1999]. Obviously, static compaction can be performed even after dynamic compaction has been used. Static compaction for combinational test vectors involves the selection of the minimal number of vectors that can detect all faults. Essentially, it is based on a covering algorithm, in which a matrix is constructed where the rows denote the vectors, and the columns denote the faults. A 1 is placed in element
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