Unformatted text preview: can detect the fault f/ 0. Note that even though the circuit is sequential it can be viewed as a combinational circuit because the D flip-flop does not have an explicit feedback. 4.12 (Static Implications) Using the circuit shown in Figure 4.22 and given the fact that the implications of f = 1 are shown in Figure 4.25, how could you use this information as multiple objectives to speed up the test generation for the fault f/ 0? 4.13 (Static Implications) Construct the static implication graph for the circuit shown in Figure 4.57 with only indirect implications. Based on the implica-tion graph: a. What are all the implications for g = 0? b. What are all the implications for f = 0? c b a e g h d f ± FIGURE 4.57 Example circuit....
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.
- Spring '08