291_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

291_pdfsam_VLSI - 260 VLSI Test Principles and Architectures[Guo 1999 R Guo S M Reddy and I Pomeranz Proptest a property based test pattern

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260 VLSI Test Principles and Architectures [Guo 1999] R. Guo, S. M. Reddy, and I. Pomeranz, Proptest: a property based test pattern generator for sequential circuits using test compaction, in Proc. Design Automation Conf. , June 1999, pp. 653–659. [Hsiao 1996a] M. S. Hsiao, E. M. Rudnick, and J. H. Patel, Automatic test generation using genetically engineered distinguishing sequences, in Proc. IEEE VLSI Test Symp. , April 1996, pp. 216–223. [Hsiao 1997] M. S. Hsiao, E. M. Rudnick, and J. H. Patel, Sequential circuit test generation using dynamic state traversal, in Proc. European Design and Test Conf. , February 1997, pp. 22–28. [Hsiao 1998] M. S. Hsiao, E. M. Rudnick, and J. H. Patel, Application of genetically engi- neered finite-state-machine sequences to sequential circuit ATPG, IEEE Trans. Comput.- Aided Des. , 17(3), 239–254, 1998. [Hsiao 2000] M. S. Hsiao, E. M. Rudnick, and J. H. Patel, Dynamic state traversal for sequential circuit test generation, ACM Trans. Des. Automat. Electron. Sys.
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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