Unformatted text preview: technique experiment results, in Proc. IEEE Int. Test Conf. , October 1995, pp. 663–672. [Kim 2001] Y. C. Kim, V. D. Agrawal, and K. K. Saluja, Combinational test generation for various classes of acyclic sequential circuits, Proc. IEEE Int. Test Conf. , October 2001, pp. 1078–1087. [Pomeranz 1991] I. Pomeranz, L. N. Reddy, and S. M. Reddy, COMPACTEST: a method to generate compact test sets for combinatorial circuits, Proc. IEEE Int. Test Conf. , October 1991, pp. 194–203. [Reddy 1997] S. M. Reddy, I. Pomeranz, and S. Kajihara, Compact test sets for high defect coverage, IEEE Trans. Comput.-Aided Des. , 16(8), 923–930, 1997. [Rudnick 1999] E. M. Rudnick and J. H. Patel, Efficient techniques for dynamic test sequence compaction, IEEE Trans. Comput.-Aided Des. , 48(3), 323–330, 1999....
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.
- Spring '08
- Integrated Circuit