299_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

299_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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268 VLSI Test Principles and Architectures known value. This can be accomplished by adding a 0-control point, 1-control point, bypass logic, or control-only scan point. We recommend the latter two approaches because they yield higher fault coverage than the former two approaches. 5.2.1.2 Memories and Non-Scan Storage Elements Examples of memories are dynamic random-access memories (DRAMs), static random-access memories (SRAMs), or flash memories. Examples of non-scan stor- age elements are D flip-flops or D latches. Bypass logic is typically used to block each unknown (X) value originating from a memory or non-scan storage element. Another approach is to use an initialization sequence to set a memory or non-scan storage element to a known state. This is typically done to avoid adding delay to critical (functional) paths. Care must be taken to ensure that the stored state is not corrupted throughout the BIST operation.
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