L09b_Review+PracticeExam

L09b_Review+PracticeExam - Sum of minterms (canonical), sum...

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1 EECS 270 Introduction to Logic Design Winter 2008 Midterm 1 Review
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2 Regular exam time: 8:00 - 9:30pm, Wednesday February 6, 2008 Exam locations (three): > EECS 1500: Students with last names A - H > EECS 1311 : Students with last names I - R > EECS 1003: Students with last names S – Z Make-up exam same day, 9:30-11:00pm > Location: EECS 1003 > You must have advance permission to take it
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3 Midterm 1 will cover material from: Lectures through Monday February 4 Labs through Friday February 1 Course textbook (Vahid): > Chapter 1 (all) > Chapter 2 (all) > Chapter 3 (Sections 3.1 - 3.4 only) Homeworks 1 - 3
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4 Digital vs. analog systems Binary encoding and binary numbers Converting numbers between different bases (binary, decimal, hexadecimal, etc.) Gate types and their CMOS implementation (NOT, AND, OR, XOR, NAND, NOR, XNOR) Truth tables and Boolean expressions
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Unformatted text preview: Sum of minterms (canonical), sum of products, and the corresponding circuits Boolean algebra: basic properties (laws) Basic combinational circuit design Completeness of NAND and NOR Decoders and multiplexers 5 Sequential vs. combinational circuits Gate delays and timing Latches and flip-flops: SR and D latches; D flip-flops Timing behavior of latches: asynchonous (unclocked) and clocked (level-sensitive) Timing behavior of flip-flops: edge-triggering Circuit timing diagrams and clocks Registers Finite-state machines (FSMs): basic concepts States and state diagrams Basic concepts used in lab experiments 6 7 8 9 10 11 12 13 14 Answers 4(c) 15 16 Answers circled 17 18 19 20 21 22 23 24 25 26...
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L09b_Review+PracticeExam - Sum of minterms (canonical), sum...

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