pr_step2.vhdl

pr_step2.vhdl - -= - EE762 - Project Assignment #2 - NAME:...

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--============================================================================= -- EE762 - Project Assignment #2 -- -- NAME: Amal Hassan -- --============================================================================= -- Generic Function Unit Entity ------------------------------------------------------------------------------- -- As you have already compiled your generic unit into the library -- from step 1 you do not need to redeclare it here. -- NOTE: If for some reason you need to re-create your VHDL library -- you will need to recompile pr_step 1. ------------------------------------------------------------------------------- -- Enter your Entity for Carry Chain Unit here ------------------------------------------------------------------------------- ENTITY carry_chain IS PORT ( cin,A,B : IN bit; cout : OUT bit); END carry_chain; ------------------------------------------------------------------------------- -- Enter your Architecture for Carry Chain Unit here ------------------------------------------------------------------------------- ARCHITECTURE proj2 of carry_chain is begin process begin WAIT FOR 5 ns; cout <= (A AND cin) OR (A AND B) OR (B AND cin); end process; end proj2; ------------------------------------------------------------------------------- -- Enter your Entity for a 1 Bit ALU here -------------------------------------------------------------------------------
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This note was uploaded on 05/19/2011 for the course ECE 762 taught by Professor Degroat during the Winter '11 term at Ohio State.

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pr_step2.vhdl - -= - EE762 - Project Assignment #2 - NAME:...

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