312HW52011

# 312HW52011 - H H H L L H L L(b Obtain the voltage transfer...

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EE 312 Digital Electronics Take Home Exam Part 5 Due: April 6-7, 2011 TTL Gates Q.1. Consider the following TTL circuit. Figure 1. Schematic for Totem-pole TTL. For the transistors: β F =40 β R =2 V CE (SAT) = 0.2V V BE (FA)= 0.7V V BE (SAT)= 0.8V V BC (RA)= 0.7V For the diodes : V D (ON)= 0.7V For the supplies: V CC = 5 V R BA =R BB =3k R C =2.5k R CP =120 R D =8k (a) Obtain the truth table and determine the function of this TTL gate assuming proper operation (you do not need to verify the states with any calculations). Use the table given below and clearly indicate the state of each semiconductor device (i.e., ON is not accepted as a state for a transistor). V IN,A V IN,B Q AI Q BI Q SA |Q SB Q P D L Q O V OUT
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Unformatted text preview: H H H L L H L L (b) Obtain the voltage transfer characteristics of this gate, i.e., V IN,A versus V OUT by determining all the breakpoints, assuming V IN,B is connected to a low voltage. For parts c and d assume that this gate is driving similar gates. The driven gates have their two inputs shorted to each other. (c) Find the maximum fan-out of this gate when the output is high, assuming that minimum tolerated V OH is 2.8 V. (d) Find the maximum fan-out of this gate when the output is low, assuming that both V IN,A =V IN,B =5V . V OUT V CC 5V Q P Q O V IN,A V IN,B R CP D L Q AI Q BI Q SA Q SB R C R BA R BB R D...
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## This note was uploaded on 05/24/2011 for the course EE 312 taught by Professor Umutsezen during the Spring '11 term at Hacettepe Üniversitesi.

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