CMU_MIPS - CMU 18-447 S09 L6-1 2009 J. C. Hoe 18-447...

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CMU 18-447 S’09 L6-1 © 2009 J. C. Hoe 18-447 Lecture 6: MIPS ISA James C. Hoe Dept of ECE, CMU February 4, 2009 Announcements: Start reading P&H Ch 1.5 and 1.7 for next Lecture Handouts: Practice Midterm 1 solutions Handout06 HW1 Solutions (on Blackboard) CMU 18-447 S’09 L6-2 © 2009 J. C. Hoe Instruction Set Architecture ± A stable platform, typically 15~20 years ­ guarantees binary compatibility for SW investments permits adoption of foreseeable technology advances ­ ± User-level ISA ­ program visible state and instructions available to user processes ­ single-user abstraction on top of HW/SW virtualization ± “Virtual Environment” Architecture state and instructions to control virtualization (e g ­ state and instructions to control virtualization (e.g., caches, sharing) ­ user-level, but not used by your average user programs ± “Operating Environment” Architecture ­ state and instructions to implement virtualization ­ privileged/protected access reserved for OS
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CMU 18-447 S’09 L6-3 © 2009 J. C. Hoe What are specified/decided in an ISA? ± Data format and size ­ character, binary, decimal, floating point, negatives ± “Programmer Visible State” ­ memory, registers, program counters, etc. ± Instructions: how to transform the programmer visible state? ­ what to perform and what to perform next ­ where are the operands ± Instruction-to-binary encoding ± How to interface with the outside world? ± Protection and privileged operations ± Software conventions Very often you compromise immediate optimality for future scalability and compatibility CMU 18-447 S’09 L6-4 © 2009 J. C. Hoe MIPS R2000 Program Visible State **Note** r0=0 r1 Program Counter 32-bit memory address r2 General Purpose Register File 32 32-bit words named r0. ..r31 M[0] M[1] M[2] M[3] M[4] of the current instruction M[N-1] Memory 2 32 by 8-bit locations (4 Giga Bytes) 32-bit address (there is some magic going on)
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CMU 18-447 S’09 L6-5 © 2009 J. C. Hoe Data Format ± Most things are 32 bits ­ instruction and data addresses signed and unsigned integer ­ signed and unsigned integers ­ just bits ± Also 16-bit word and 8-bit word (aka byte) ± Floating-point numbers ­ IEEE standard 754 ­ float: 8-bit exponent, 23-bit significand ­ double: 11-bit exponent, 52-bit significand CMU 18-447 S’09 L6-6 © 2009 J. C. Hoe Big Endian vs. Little Endian (Part I, Chapter 4, Gulliver’s Travels) ± 32-bit signed or unsigned integer comprises 4 bytes LSB MSB ± On a byte-addressable machine . . . . . . . Big Endian Little Endian 8-bit 8-bit 8-bit 8-bit (least significant) (most significant) byte 0 byte 1 byte 2 byte 3 MSB LSB byte 4 byte 5 byte 6 byte 7 MSB LSB byte 0 byte 1 byte 2 byte 3 byte 4 byte 5 byte 6 byte 7 ± What difference does it make? byte 8 byte 9 byte 10 byte 11 byte 12 byte 13 byte 14 byte 15 byte 16 byte 17 byte 18 byte 19 byte 8 byte 9 byte 10 byte 11 byte 12 byte 13 byte 14 byte 15 byte 16 byte 17 byte 18 byte 19 check out htonl(), ntohl() in in.h pointer points to the big end pointer points to the little end
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CMU 18-447 S’09 L6-7 © 2009 J. C. Hoe Instruction Formats ± 3 simple formats ­ R-type, 3 register operands
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This note was uploaded on 05/25/2011 for the course ELECTRONIC 749 taught by Professor Aliziyaalkar during the Spring '11 term at Hacettepe Üniversitesi.

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CMU_MIPS - CMU 18-447 S09 L6-1 2009 J. C. Hoe 18-447...

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