ele749-18memoryintro - ELE749 Memory Hierarchy.1 Hacettepe...

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Unformatted text preview: ELE749 Memory Hierarchy.1 Hacettepe University ELE 749 COMPUTER ORGANIZATION and DESIGN Lecture 18: Memory Hierarchy Review Ali Ziya Alkar ELE749 Computer Organization and Design [Adapted from Computer Organization and Design , Patterson & Hennessy, © 2005, UCB] ELE749 Memory Hierarchy.2 Hacettepe University Review: Major Components of a Computer Processor Control Datapath Memory Devices Input Output ELE749 Memory Hierarchy.3 Hacettepe University Processor-Memory Performance Gap 1 10 100 1000 10000 1980 1984 1988 1992 1996 2000 2004 Year Performance “Moore’s Law” μProc 55%/year (2X/1.5yr) DRAM 7%/year (2X/10yrs) Processor-Memory Performance Gap (grows 50%/year) ELE749 Memory Hierarchy.4 Hacettepe University The “Memory Wall” ¡ Logic vs DRAM speed gap continues to grow 0.01 0.1 1 10 100 1000 VAX/1980 PPro/1996 2010+ Core Memory Clocks per instruction Clocks per DRAM access ELE749 Memory Hierarchy.5 Hacettepe University Memory Performance Impact on Performance ¡ Suppose a processor executes at z ideal CPI = 1.1 z 50% arith/logic, 30% ld/st, 20% control and that 10% of data memory operations miss with a 50 cycle miss penalty Ideal CPI, 1.1 DataMiss, 1.5 InstrMiss, 0.5 ¡ CPI = ideal CPI + average stalls per instruction = 1.1(cycle) + ( 0.30 (datamemops/instr) x 0.10 (miss/datamemop) x 50 (cycle/miss) ) = 1.1 cycle + 1.5 cycle = 2.6 so 58% of the time the processor is stalled waiting for memory! ¡ A 1% instruction miss rate would add an additional 0.5 to the CPI! ELE749 Memory Hierarchy.6 Hacettepe University The Memory Hierarchy Goal ¡ Fact: Large memories are slow and fast memories are small ¡ How do we create a memory that gives the illusion of being large, cheap and fast (most of the time)? z With hierarchy z With parallelism ELE749 Memory Hierarchy.7 Hacettepe University A Typical Memory Hierarchy ¡ By taking advantage of the principle of locality z Can present the user with as much memory as is available in the cheapest technology z at the speed offered by the fastest technology Second Level Cache (SRAM) Control Datapath Secondary Memory (Disk) On-Chip Components R e g F i le Main Memory (DRAM) D a ta C a c h e I n s t r C a c h e IT L B D T L B eDRAM peed (%cycles): ½’s 1’s 10’s 100’s 1,000’s ize (bytes): 100’s K’s 10K’s M’s G’s to T’s Cost: highest lowest ELE749 Memory Hierarchy.8 Hacettepe University Characteristics of the Memory Hierarchy Processor Increasing distance from the processor in access time L1$ L2$ Main Memory Secondary Memory Inclusive – what is in L1$ is a subset of what is in L2$ is a subset of what is in MM that is a subset of is in SM 4-8 bytes ( word ) 1 to 4 blocks 1,024+ bytes ( disk sector = page ) 8-32 bytes ( block ) (Relative) size of the memory at each level ELE749 Memory Hierarchy.9 Hacettepe University Memory Hierarchy Technologies ¡ Caches use SRAM for speed and technology compatibility z Low density (6 transistor cells), high power, expensive, fast...
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  • Spring '11
  • AliZiyaAlkar
  • Central processing unit, Dynamic random access memory, Static random access memory, Hacettepe University

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ele749-18memoryintro - ELE749 Memory Hierarchy.1 Hacettepe...

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