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nashelsky_15_10

# nashelsky_15_10 - eration is achieved by using...

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Unformatted text preview: eration is achieved by using complementary transistors (QI and Q2) before the matched npn output transistors (Q3 and Q4). Notice that transistors Q1 and Q3 form a Darling- ton connection that provides output from a low-impedance emitter—follower. The con- nection of transistors Q3 and Q 4 forms a feedback pair, which similarly provides a low- impedance drive to the load. Resistor R: can be adjusted to minimize crossover distortion by adjusting the dc bias condition. The single input signal applied to the push—pull stage then results in a full cycle output to the load. The quasi—complemen— tary push—pull ampliﬁer is presently the most popular form of power ampliﬁer. EXAMPLE 15.10 For the circuit of Fig. 15.19. calculate the input power, output power, and power han- dled by each output transistor and the circuit efﬁciency for an input of 12 V rms. +VCC = +25 V Vi Figure 15.19 Class B power amplifier for Examples 15.10— 455 =—25v 15.12. Solution The peak input voltage is V,-(p) = V? Mans) = \/§(12 V) = 16.97 v z 17 v Since the resulting voltage across the load is ideally the same as the input signal (the ampliﬁer has, ideally, a voltage gain of unity), VL(p) = 17 V and the output power developed across the load is _ Vi(pl _ (17W _ P0(ac) — 2RL — 2(4 0) — 36.125W The peak load current is VL(P) 17 V 1 p) = = ~— = 4.25 A A RL 4 o. from which the dc current from the supplies is calculated to be 2 2 4.25 A Idc = Irtpl = (“—J = 2-71 A T 77 Chapter 15 Power Amplifiers so that the power supplied to the circuit is Pf(dc) = VCCIdc = (25 V)(2.7l A) = 67.75 W The power dissipated by each output transistor is P26 = P,- — P0 = 67.75 w — 36.125 W P = — 15. W Q 2 2 2 8 The circuit efﬁciency (for the input of 12 V, ms) is then P. 36.125 w ‘7 = — X 1 = ~ X = . 0 77 Pi 00% 67.75W 100% 533% For the circuit of Fig. 15.19, calculate the maximum input power, maximum output EXAMPLE 15.11 power, input voltage for maximum power operation, and the power dissipated by the output transistors at this voltage. Solution The maximum input power is 2V2CC _ 2(25 V)2 max1mum P,-(dc) = 7TRL 7T4 Q = 99.47 W The maximum output power is V2 25 V 2 max1mum P0(ac) = 27:: = (2(4 9)) = 78.125 W [Note that the maximum efﬁciency is achieved:] % 77 = 5 X 100% = M100% = 78.54% Pi 99.47 W To achieve maximum power operation the output voltage must be VL(P) = VCC = 25 V and the power dissipated by the output transistors is then P29 = P,- — P0 = 99.47 W — 78.125 W = 21.3 W For the circuit of Fig. 15.19, determine the maximum power dissipated by the output EXAMPLE 15.12 transistors and the input voltage at which this occurs. Solution The maximum power dissipated by both output transistors is 2ng _ 2(25 V)2 — = 31.66 W szL 7724 0 maximum PZQ = This maximum dissipation occurs at VL = 0.636VL(p) = 0.636(25 V) = 15.9 V (Notice that at VL = 15.9 V the circuit required the output transistors to dissipate 31.66 W, while at VL = 25 V they only had to dissipate 21.3 W.) .————_— 15.5 Class B Ampliﬁer Circuits 771 ...
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