472 Lecture 9b small signal

472 Lecture 9b small signal - Lecture 9b Small-signal...

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Lecture 9b 1 Lecture 9b Small-signal models of dc-dc converters • Small signal model of a power pole • Transfer functions of buck converter based on small-signal model • Simulation verification EEE 498/591 – Raja Ayyanar
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Lecture 9b 2 Bandwidth, Phase margin 2*pi*Frequency 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz P(V(VO1)) -180 -200 -100 0 SEL>> DB(V(VO1)) 0 -40 -20 0 20 40 60 -180 0 -108 0 0 db m = 72 0 • Defined on the open loop gain of the overall system • Cross over frequency, c – Magnitude reaches 0 dB • Phase margin = 180 + phase angle at c • Phase margin should be positive for stability • Low phase margin – overshoots, oscillatory response • Aim for phase margin close to 60 0 C EEE 498/591 – Raja Ayyanar
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Lecture 9b 3 Closed loop gain ( ) OL Gs ( ) CL dB dB 0 0 -90 -90 0 K rad/sec K rad/sec ( ) o vs + _ K s ( ) , ore f () ( ) ( ) 1 OL CL OL = + ( ) ( ) ( ) 1 CL GsHs = + For unity feedback systems ( ) ( ) , o CL f = EEE 498/591 – Raja Ayyanar
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Lecture 9b 4 Average model of the building block d () vp vt cp cp it vp + _ + _ vp + _ vp cp cp + _ 1 :d d cp vp vp cp vd v id i = = EEE 498/591 – Raja Ayyanar
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This note was uploaded on 05/25/2011 for the course EE 472 taught by Professor Ayynar during the Spring '11 term at ASU.

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472 Lecture 9b small signal - Lecture 9b Small-signal...

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