472 Lecture 10 K factor controller

472 Lecture 10 K factor controller - Lecture 10 K-Factor...

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Lecture 12 1 Lecture 10 K-Factor Controller Design • Small signal model of PWM block • Control objectives and loop shaping • K-factor control design - Type I, II and III controllers Step by step design procedure using PSpice/PLECS • Buck converter design example EEE 498/591 – Raja Ayyanar
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Lecture 10 2 Small-signal model of PWM block PWM Controller v ramp ( t ) V o,ref V o,sense q ( t ) v c ( t ) v ramp ( t ) v c ( t ) t 1 0 d T S T S q ( t ) ... ... d ( t ) ( ) ( ) 00 ˆ 1 c cr a m p vt d V d = = = = () ( ) ˆ c ramp dt V = ( ) ( ) ˆˆ cc ramp ramp D d Vt VV =+ PWM v c ( s ) d ( s ) ( ) ( ) 1 ˆ c ramp ds vs V = EEE 498/591 – Raja Ayyanar
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Lecture 10 3 Objectives 1. Stability under all operating conditions low overshoot 2. Zero steady state error - line regulation - load regulation 3. Fast response to disturbances a. step load changes b. dynamic input variations 4. Fast response to changes in command input 1. Phase margin ~60 0 2. Infinite dc gain in G OL 3. High bandwidth, 4. High bandwidth small, small oo oi n vv iv  EEE 498/591 – Raja Ayyanar
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Lecture 10 4 Loop shaping (open loop gain) • Determine desired cross over frequency (from specifications on dynamic performance) • Integrator (pole at origin) for infinite dc gain • Zeroes at appropriate locations to improve phase margin • Adjust constant gain to achieve required cross over frequency • Fast roll-off after the cross over frequency to improve noise immunity EEE 498/591 – Raja Ayyanar
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Lecture 12 5 Advantages of K-factor approach • Results in optimum zero, pole locations, for a given phase margin and cross over frequency
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472 Lecture 10 K factor controller - Lecture 10 K-Factor...

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