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Unformatted text preview: c Copywright 2008. W. Marshall Leach, Jr., Professor, Georgia Institute of Technology, School of Electrical and Computer Engineering. The JFET Device Equations The circuit symbols for the junction FET or JFET are shown in Fig. 1. There are two types of devices, the n-channel and the p-channel. Each device has gate (G), drain (D), and source (S) terminals. The drain and source connect through a semiconductor channel. A diode junction separates the gate from the channel. For proper operation as an amplifying device, this junction must be reverse biased. This requires v GS < for the n-channel device and v GS > for the p-channel device. Figure 1: JFET circuit symbols. (a) N channel. (b) P channel. The discussion here applies to the n-channel JFET. The equations apply to the p-channel device if the subscripts for the voltage between any two of the device terminals are reversed, e.g. v GS becomes v SG . The JFET must be biased with the gate-source junction reverse biased to prevent the f ow of gate current, i.e. v GS < for the n-channel device and v GS > for the p-channel device. The gate current is then equal to the reverse saturation current of the junction. This current is very small and is usually neglected in bias and small-signal calculations. However, its e f ect is included in the noise model given here. The JFET is biased in the active mode or the saturation region when v DS v GS V T O , where V T O is the threshold or pinch-o f voltage, which is negative. In the saturation region, the drain current is given by i D = ( v GS V T O ) 2 for v GS V P = 0 for v GS < V T O (1) where is the transconductance coe cient given by = (1 + v DS ) (2) In this equation, is the zero-bias value of , i.e. the value with v DS = 0 , and is the channel- length modulation parameter which accounts for the change in with drain-source voltage. Because i G ' in the pinch-o f region, the source current is equal to the drain current, i.e. i S = i D . A second way of writing the JFET current is i D = I DSS 1 v GS V P 2 for v GS V P = 0 for v GS < V P (3) 1 where I DSS is the drain-source saturation current, i.e. the value of i D with v GS = 0 . It is given by I DSS = V 2 T O = (1 + v DS ) V 2 T O (4) Typical device parameters are = 2 10 4 A/V 2 , V T O = 4 V, and = 0 . 01 V 1 . Figure 2 shows the typical variation of the drain current i D with gate-to-source voltage v GS for V T O v GS . The slope of the curve is the small-signal transconductance g m . For v GS < V T O , the drain current is zero. For v GS > , gate current f ows. Fig. 2 shows the typical variation of drain current i D with drain-to-source voltage v DS for eight values of V GS in the range V T O < V GS ....
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This note was uploaded on 05/26/2011 for the course ECE 3050 taught by Professor Hollis during the Summer '08 term at Georgia Institute of Technology.
- Summer '08