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# snglstg - BJT Single Stage Amplier Circuits ECE 3050 Analog...

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BJT Single Stage Ampli fi er Circuits ECE 3050 — Analog Electronics The Common-Emitter Ampli fi er The common-emitter ampli fi er is used to obtain a high voltage gain and a high input resis- tance. The circuit in Fig. 1(a) shows the ac signal circuit. The input source is represented by a Thévenin equivalent connected to the base. The output is taken from the collector. We assume that the dc bias solution is known and that the BJT is biased in its active mode. The small-signal parameters r e , r 0 e , and r 0 are given by r e = V T I E r 0 e = R tb + r x 1 + β + r e r 0 = V A + V CE I C Figure 1: (a) Ac signal circuit of the common-emitter ampli fi er. (b) Equivalent input and output circuits. The circuit in Fig. 1(b) shows the equivalent input and output circuits. The collector output voltage is given by v c = i c ( sc ) ( r ic k R tc ) = G mb v tb ( r ic k R tc ) It follows that the voltage gain from v tb to v c is given by A v = v c v tb = G mb ( r ic k R tc ) where G mb = α r 0 e + R te k r 0 r 0 R te r 0 + R te r ic = r 0 + r 0 e k R te 1 αR te / ( r 0 e + R te ) Note that the voltage gain is negative. This means that the CE ampli fi er is an inverting ampli fi er. The output resistance seen looking into the v c node is r out = r ic k R tc 1

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The input resistance seen looking into the v b node is r ib = r x + (1 + β ) r e + R te (1 + β ) r 0 + R tc r 0 + R te + R tc When the r 0 approximations are used, G mb and r ib are replaced with G mb ' α r 0 e + R te r ib ' r x + (1 + β ) ( r e + R te ) Example 1 Fig. 2 shows the circuit diagrams of NPN and PNP single-stage CE ampli fi ers. For each circuit, it is given that R S = 5 k , R 1 = 120 k , R 2 = 100 k , R C = 4 . 3 k , R E = 5 . 6 k , R 3 = 100 , R L = 20 k , V + = 15 V , V = 15 V , V BE = 0 . 65 V , β = 99 , α = 0 . 99 , r x = 20 , V A = 100 V and V T = 0 . 025 V . Solve for the gain A v = v o /v s , the input resistance r in , and the output resistance r out . The capacitors can be assumed to be ac short circuits at the operating frequency. Figure 2: Single-stage CE ampli fi ers. Solution. For the dc bias solution, replace all capacitors with open circuits. For the NPN circuit, the Thévenin voltage and resistance seen looking out of the base are V BB = V + R 2 + V R 1 R 1 + R 2 = 1 . 364 V R BB = R 1 k R 2 = 54 . 55 k 2
The Thévenin voltage and resistance seen looking out of the emitter are V EE = V and R EE = R E . The bias equation for I E is I E = V BB V EE V BE R BB / (1 + β ) + R EE = 2 . 113 mA To test for the active mode, we calculate the collector-base voltage V CB = V C V B = ¡ V + αI E R C ¢ μ V BB I E 1 + β R BB = 8 . 521 V Because this is positive, the BJT is biased in its active mode. For the small-signal ac analysis, we need r 0 and r e . To calculate r 0 , we fi rst calculate the collector-emitter voltage V CE = V CB + V BE = 9 . 171 V It follows that r 0 and r e have the values r 0 = V A + V CE αI E = 52 . 18 k r e = V T I E = 11 . 83 For the small-signal analysis, V + and V

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