dsgnproj - ECE3050 Summer 2005 Design Project The gure...

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ECE3050 Summer 2005 Design Project The f gure shows the circuit diagram of an operational ampli f er. The object of this assignment is to calculate the circuit elements and perform a SPICE simulation. You must write the netlist or SPICE deck for the assignment. You are not permitted to use a schematic editor to generate the netlist. To do this, you use an ascii text editor. Such an editor is part of both PSpice , Notepad, or Wordpad .Th e f rst line of the netlist must be a title line. You can title it ECE 3050 DESIGN PROJECT. A suggested name for the ascii netlist f le is opamp.cir. Comment lines must be preceded by an asterisk. Continuation lines must be preceded by a plus sign followed by a space. Write the netlist using all capital letters. For the JFET and BJTs in the circuit, you are to use the following SPICE MODEL statements: J 1 .MODEL MNJF1 NJF BETA=5E-4 VTO=-3 LAMBDA=0.0125 Q 1 , Q 2 , Q 5 Q 7 .MODEL MNPN1 NPN IS=1.26E-14 BF=149 VA=150 Q 3 , Q 4 , Q 8 .MODEL MPNP1 PNP IS=1.26E-14 BF=149 VA=150 where BF for the BJT is its β . The other parameters should be self explanatory. In your calculations for the resistors, you can neglect the Early e f ect, i.e. set V A = and λ =0 . In addition, with the exception of Q 5 and Q 6 , neglect all BJT base currents, i.e. set I B =0 . First, label the node numbers for each node in the circuit. The ground node must be labeled 0. Voltage sources are of the form VX N1 N2 AC ACVAL DC DCVAL ,where VX isthesourcename , N1 is the positive node, N2 is the negative node, ACVAL is the ac phasor value, and DCVA
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This note was uploaded on 05/26/2011 for the course ECE 3050 taught by Professor Hollis during the Summer '08 term at Georgia Institute of Technology.

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dsgnproj - ECE3050 Summer 2005 Design Project The gure...

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