5: DataLink Layer 5-1 Chapter 5 Link Layer and LANs Computer Networking: A Top Down Approach 4 th edition. Jim Kurose, Keith Ross Addison-Wesley, July 2007.
5: DataLink Layer 5-2 Link Layer ❒ 5.1 Introduction and services ❒ 5.2 Error detection and correction ❒ 5.3Multipleaccess protocols ❒ 5.4 Link-layer Addressing ❒ 5.5 Ethernet ❒ 5.6 Link-layer switches ❒ 5.7 PPP ❒ 5.8 Link virtualization: ATM, MPLS
5: DataLink Layer 5-3 Link Layer: Introduction Some terminology: ❒ hosts and routers are nodes ❒ communication channels that connect adjacent nodes along communication path are links ❍ wired links ❍ wireless links ❍ LANs ❒ layer-2 packet is a frame , encapsulates datagram data-link layer has responsibility of transferring datagram from one node to adjacent nodeover a link
5: DataLink Layer 5-4 Link Layer Services ❒ framing, link access: ❍ encapsulate datagram into frame, adding header, trailer ❍ channel access if shared medium ❍ “MAC” addresses used in frame headers to identify source, dest • different from IP address! ❒ reliabledelivery between adjacent nodes ❍ welearned how to do this already (chapter 3)! ❍ seldom used on low bit-error link (fiber, some twisted pair) ❍ wireless links: high error rates • Q: why both link-level and end-end reliability?
5: DataLink Layer 5-5 Link Layer Services (more) ❒ flow control: ❍ pacing between adjacent sending and receiving nodes ❒ error detection: ❍ errors caused by signal attenuation, noise. ❍ receiver detects presence of errors: • signals sender for retransmission or drops frame ❒ error correction: ❍ receiver identifies and corrects bit error(s) without resorting to retransmission ❒ half-duplex and full-duplex ❍ with half duplex, nodes at both ends of link can transmit, but not at same time
5: DataLink Layer 5-6 Whereis thelink layer implemented? ❒ in each and every host ❒ link layer implemented in “adaptor” (aka network interfacecard NIC) ❍ Ethernet card, PCMCI card, 802.11 card ❍ implements link, physical layer ❒ attaches into host’s system buses ❒ combination of hardware, software, firmware controller physical transmission cpu memory host bus (e.g., PCI) network adapter card host schematic application transport network link link physical
5: DataLink Layer 5-7 Adaptors Communicating ❒ sending side: ❍ encapsulates datagram in frame ❍ adds error checking bits, reliable data transfer (rdt), flow control, etc. ❒ receiving side ❍ looks for errors, rdt, flow control, etc ❍ extracts datagram, passes to upper layer at receiving side controller controller sending host receiving host datagram datagram datagram frame
5: DataLink Layer 5-8 Error Detection EDC= Error Detection and Correction bits (redundancy) D = Data protected by error checking, may include header fields • Error detection not 100% reliable!
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