ch2_040802 - Embedded Systems Design: A Unified...

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1 Embedded Systems Design: A Unified Hardware/Software Introduction Chapter 2: Custom single-purpose processors
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2 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis Outline Introduction Combinational logic Sequential logic Custom single-purpose processor design RT-level custom single-purpose processor design
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3 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis Introduction Processor Digital circuit that performs a computation tasks Controller and datapath tasks computation task Custom single-purpose: non-standard task A custom single-purpose processor may be Fast, small, low power But, high NRE, longer time-to-market, less flexible Microcontroller Pixel coprocessor D2A JPEG codec DMA controller Memory controller ISA bus interface UART LCD ctrl Display ctrl Multiplier/Accum Digital camera chip CCD
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4 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis CMOS transistor on silicon Transistor The basic electrical component in digital systems Acts as an on/off switch Voltage at “gate” controls whether current flows from source to drain Don’t confuse this “gate” with a logic gate source drain oxide gate IC package IC channel Silicon substrate gate source drain Conducts if gate=1 1
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5 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis CMOS transistor implementations Complementary Metal Oxide Semiconductor We refer to logic levels Typically 0 is 0V, 1 is 5V Two basic CMOS types nMOS conducts if gate=1 pMOS conducts if gate=0 Hence “complementary” Basic gates Inverter, NAND, NOR x F = x' 1 inverter 0 F = (xy)' x 1 x y y NAND gate 0 1 F = (x+y)' x y x y NOR gate 0 gate source drain nMOS Conducts if gate=1 gate source drain pMOS Conducts if gate=0
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6 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis Basic logic gates F = x y AND F = (x y)’ NAND F = x y XOR F = x Driver F = x’ Inverter x F F = x + y OR F = (x+y)’ NOR x F x y F F x y x y F x y F x y F F = x y XNOR F y x x 0 y 0 F 0 0 1 0 1 0 0 1 1 1 x 0 y 0 F 0 0 1 1 1 0 1 1 1 1 x 0 y 0 F 0 0 1 1 1 0 1 1 1 0 x 0 y 0 F 1 0 1 0 1 0 0 1 1 1 x 0 y 0 F 1 0 1 1 1 0 1 1 1 0 x 0 y 0 F 1 0 1 0 1 0 0 1 1 0 x F 0 0 1 1 x F 0 1 1 0
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7 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis Combinational logic design A) Problem description y is 1 if a is to 1, or b and c are 1. z is 1 if b or c is to 1, but not both, or if all are 1. D) Minimized output equations 00 0 1 01 11 10 0 1 0 1 0 1 1 1 a bc y y = a + bc 00 0 1 01 11 10 0 0 1 0 1 1 1 1 z z = ab + b’c + bc’ a bc C) Output equations y = a'bc + ab'c' + ab'c + abc' + abc z = a'b'c + a'bc' + ab'c + abc' + abc B) Truth table 1 0 1 1 1 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 0 0 0 0 0 Inputs a b c Outputs y z E) Logic Gates a b c y z
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8 Embedded Systems Design: A Unified Hardware/Software Introduction, (c) 2000 Vahid/Givargis Combinational components With enable input e all O’s are 0 if e=0 With carry-in input Ci sum = A + B + Ci May have status outputs carry, zero, etc.
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ch2_040802 - Embedded Systems Design: A Unified...

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