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# AppAPOCA - A-1 Appendix A Digital Logic Principles of...

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Appendix A: Digital Logic A-1 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Principles of Computer Architecture Miles Murdocca and Vincent Heuring Appendix A: Digital Logic

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Appendix A: Digital Logic A-2 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Chapter Contents A.1 Introduction A.2 Combinational Logic A.3 Truth Tables A.4 Logic Gates A.5 Properties of Boolean Algebra A.6 The Sum-of-Products Form, and Logic Diagrams A.7 The Product-of-Sums Form A.8 Positive vs. Negative Logic A.9 The Data Sheet A.10 Digital Components A.11 Sequential Logic A.12 Design of Finite State Machines A.13 Mealy vs. Moore Machines A.14 Registers A.15 Counters
Appendix A: Digital Logic A-3 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Some Definitions Combinational logic: a digital logic circuit in which logical deci- sions are made based only on combinations of the inputs. e.g. an adder. Sequential logic: a circuit in which decisions are made based on combinations of the current inputs as well as the past history of inputs. e.g. a memory unit. Finite state machine: a circuit which has an internal state, and whose outputs are functions of both current inputs and its inter- nal state. e.g. a vending machine controller.

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Appendix A: Digital Logic A-4 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Combinational logic unit . . . i 0 i 1 i n . . . f 0 f 1 f m (i 0 , i 1 ) (i 1 , i 3 , i 4 ) (i 9 , i n ) The Combinational Logic Unit Translates a set of inputs into a set of outputs according to one or more mapping functions. Inputs and outputs for a CLU normally have two distinct (binary) values: high and low, 1 and 0, 0 and 1, or 5 V and 0 V for example. The outputs of a CLU are strictly functions of the inputs, and the outputs are updated immediately after the inputs change. A set of inputs i 0 – i n are presented to the CLU, which produces a set of outputs according to mapping functions f 0 – f m .
Appendix A: Digital Logic A-5 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring 0 0 1 1 0 1 0 1 A B 0 1 1 0 Z Inputs Output Switch A Switch B “Hot” GND Light Z A Truth Table Developed in 1854 by George Boole. Further developed by Claude Shannon (Bell Labs). Outputs are computed for all possible input combinations (how many input combinations are there?) Consider a room with two light switches. How must they work?

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Appendix A: Digital Logic A-6 Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Alternate Assignment of Outputs to Switch Settings We can make the assignment of output values to input combi- nations any way that we want to achieve the desired input-out- put behavior. 0 0
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