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CGS3269.HW2.Fall09 - the output of the adder must be...

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UCF School of Electrical Engineering & Computer Science CGS 3269 Computer Architecture Fall 2009 DUE 10/25/2009 (11:59 p.m.) 1.- Give the schematic of a ring counter. Use five D flip/flops. (10 points) (5 points) 2.- Dive the design at the gate level of a SR flip/flop including clock. Use NOR gates. (10 points) 3.- Give the schematic of a counter register which is able to count of to 7. Use JK flip/flops. (10 points) 4.- Using D flip/flops, create three registers of two bits each. Name the registers R1, R2, and R3. Give the design of and adder (gate level) to add the contents of R1 and R2 and
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Unformatted text preview: the output of the adder must be connected to R3. (25 points) 5.- Create a register file with four registers and connect them using multiplexers and demultiplexers in order to communicate any register with all the others. (20 points) 6.- Give the design of a memory with 4 words of two bits each. Connect the memory to the registers MDR and MAR. (30 points) Submit through Webcourses. 1.- A word document with the answers to question 1 to 6....
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