PowerPointPres_Ch5_ECOA2e

PowerPointPres_Ch5_ECOA2e - Chapter 5 A Closer Look at...

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Chapter 5 A Closer Look at Instruction Set Architectures
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2 Chapter 5 Objectives Understand the factors involved in instruction set architecture design. Gain familiarity with memory addressing modes. Understand the concepts of instruction-level pipelining and its affect upon execution performance.
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3 5.1 Introduction This chapter builds upon the ideas in Chapter 4 . We present a detailed look at different instruction formats, operand types, and memory access methods. We will see the interrelation between machine organization and instruction formats. This leads to a deeper understanding of computer architecture in general.
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4 5.2 Instruction Formats Instruction sets are differentiated by the following: Number of bits per instruction. Stack-based or register-based. Number of explicit operands per instruction. Operand location. Types of operations. Type and size of operands.
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5 5.2 Instruction Formats Instruction set architectures are measured according to: Main memory space occupied by a program. Instruction complexity. Instruction length (in bits). Total number of instructions in the instruction set.
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6 5.2 Instruction Formats In designing an instruction set, consideration is given to: Instruction length. Whether short, long, or variable. Number of operands. Number of addressable registers. Memory organization. Whether byte- or word addressable. Addressing modes. Choose any or all: direct, indirect or indexed.
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7 Byte ordering, or endianness , is another major architectural consideration. If we have a two-byte integer, the integer may be stored so that the least significant byte is followed by the most significant byte or vice versa. In little endian machines, the least significant byte is followed by the most significant byte. Big endian machines store the most significant byte first (at the lower address). 5.2 Instruction Formats
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8 As an example, suppose we have the hexadecimal number 12345678. The big endian and small endian arrangements of the bytes are shown below. 5.2 Instruction Formats
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9 5.2 Instruction Formats Big endian: Is more natural. The sign of the number can be determined by looking at the byte at address offset 0. Strings and integers are stored in the same order. Little endian: Makes it easier to place values on non-word boundaries. Conversion from a 16-bit integer address to a 32-bit integer address does not require any arithmetic.
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5.2 Instruction Formats The next consideration for architecture design concerns how the CPU will store data. We have three choices: 1. A stack architecture 2. An accumulator architecture 3. A general purpose register architecture. In choosing one over the other, the tradeoffs are
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This note was uploaded on 06/13/2011 for the course CGS 3269 taught by Professor Staff during the Spring '08 term at University of Central Florida.

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PowerPointPres_Ch5_ECOA2e - Chapter 5 A Closer Look at...

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