CAD_4-SCHEMATIC1-voltage_gain_and_input_resistance_output_file

CAD_4-SCHEMATIC1-voltage_gain_and_input_resistance_output_file

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*** 11/16/07 10:39:23 ************** PSpice Lite (Mar 2000) ***************** ** Profile: "SCHEMATIC1-voltage_gain_and_input_resistance" [ C:\Documents and Settings\hgordon\Desktop\economos\CAD3\CAD_4-SCHEMATI **** CIRCUIT DESCRIPTION ***************************************************************************** * Creating circuit file "CAD_4-SCHEMATIC1-voltage_gain_and_input_resistance.sim.cir" * WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS Libraries: Local Libraries : From [PSPICE NETLIST] section of C:\Program Files\OrcadLite\PSpice\PSpice.ini file: lib "nom.lib" Analysis directives: AC DEC 10 1e2 1e7 OP PROBE V(*) I(*) W(*) D(*) NOISE(*) INC ". .\. .\. .\. .\usf\courses\eel 3302\eel 3302 files\cad_04\CAD_4-SCHEMATIC1.net" *** INCLUDING CAD_4-SCHEMATIC1.net **** source CAD_4 _R11 N00405 N00512 30k _C11 N05022 N00405 1uf _Q1 N00346 N00405 N00483 Q2N3904 _RC1 N00346 N00512 2k _RE1 0 N00483 1.5k _CE1 0 N00483 50uF _R21 0 N00405 15k _RL1 0 N00315 2k
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This note was uploaded on 06/13/2011 for the course EEL 3302 taught by Professor Staff during the Spring '08 term at University of South Florida - Tampa.

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CAD_4-SCHEMATIC1-voltage_gain_and_input_resistance_output_file

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