CAD_4-SCHEMATIC2-voltage_gain_and output_resistance_output_file

CAD_4-SCHEMATIC2-voltage_gain_and output_resistance_output_file

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*** 11/16/07 11:52:28 ************** PSpice Lite (Mar 2000) ***************** ** Profile: "SCHEMATIC2-voltage_gain_and_output_resistance" [ C:\Documents and Settings\usf\courses\EEL 3302\EEL 3302 FILES\cad_04\ **** CIRCUIT DESCRIPTION ***************************************************************************** * Creating circuit file "cad_4-schematic2-voltage_gain_and_output_resistance.sim.cir" * WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS Libraries: Local Libraries : From [PSPICE NETLIST] section of C:\Program Files\OrcadLite\PSpice\PSpice.ini file: lib "nom.lib" Analysis directives: AC DEC 10 1e2 3e6 OP PROBE V(*) I(*) W(*) D(*) NOISE(*) INC ".\CAD_4-SCHEMATIC2.net" *** INCLUDING CAD_4-SCHEMATIC2.net **** source CAD_4 _R12 N00405 N00512 30k _C12 N05022 N00405 1uf _Q12 N00346 N00405 N00483 Q2N3904 _RC2 N00346 N00512 2k _CE2 0 N00483 50uF _R22 0 N00405 15k _RL2 0 N00315 2k _I12 N00315 0 DC 0Adc AC 1Aac _RE2 0 N00483 1.5k _VCC2 N00512 0 12Vdc
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This note was uploaded on 06/13/2011 for the course EEL 3302 taught by Professor Staff during the Spring '08 term at University of South Florida - Tampa.

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CAD_4-SCHEMATIC2-voltage_gain_and output_resistance_output_file

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