LM.Lecture4 - Distributed Operating Systems CS551 Colorado...

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Unformatted text preview: Distributed Operating Systems CS551 Colorado State University at Lockheed-Martin Lecture 4 -- Spring 2001 21 February 2001 CS-551, Lecture 4 2 CS551: Lecture 4 Topics Memory Management Simple Shared Distributed Migration Concurrency Control Mutex and Critical Regions Semaphores Monitors 21 February 2001 CS-551, Lecture 4 3 Centralized Memory Management Review Memory: cache, RAM, auxiliary Virtual Memory Pages and Segments Internal/External Fragmentation Page Replacement Algorithm Page Faults => Thrashing FIFO, NRU, LRU Second Chance; Lazy (Dirty Pages) 21 February 2001 CS-551, Lecture 4 4 Figure 4.1 Fragmentation in Page-Based Memory versus a Segment-Based Memory. (Galli, p.83) 21 February 2001 CS-551, Lecture 4 5 Figure 4.2 Algorithms for Choosing Segment Location. (Galli,p.84) 21 February 2001 CS-551, Lecture 4 6 Simple Memory Model Used in parallel NUMA systems Access times equal for all processors Too many processors => thrashing => need for lots of memory High performance parallel computers May not use cache -- to avoid overhead May not use virtual memory 21 February 2001 CS-551, Lecture 4 7 Shared Memory Model Shared memory can be a means of interprocess communication Virtual memory with multiple physical memories, caches, and secondary storage Easy to partition data for parallel processing Easy migration for load balancing Example systems: Amoeba: shared segments on same system Unix System V: sys/shm.h 21 February 2001 CS-551, Lecture 4 8 Shared Memory via Bus P1 P2 P7 P8 Shared Memory P9 P10 P5 P4 P3 P6 21 February 2001 CS-551, Lecture 4 9 Shared Memory Disadvantages All processors read/write common memory Requires concurrency control Processors may be linked by a bus Too much memory activity may cause bus contention Bus can be a bottleneck Each processor may have own cache => cache coherency (consistency) problems Snoopy (snooping) cache is a solution 21 February 2001 CS-551, Lecture 4 10 Bused Shared Memory w/Caches P1 P2 P7 P8 Shared Memory P9 P10 P5 P4 P3 P6 cache cache cache cache cache cache cache cache cache cache 21 February 2001 CS-551, Lecture 4 11 Shared Memory Performance Try to overlap communication and computation Try to prefetch data from memory Try to migrate processes to processors that hold needed data in local memory Page scanner Bused shared memory does not scale well More processors => bus contention Faster processors => bus contention 21 February 2001 CS-551, Lecture 4 12 Figure 4.3 Snoopy Cache. (Galli,p.89) 21 February 2001 CS-551, Lecture 4 13 Cache Coherency (Consistency) Want local caches to have consistent data If two processor caches contain same data, the data should have the same value If not, caches are not coherent But what if one/both processors change the data value?data value?...
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LM.Lecture4 - Distributed Operating Systems CS551 Colorado...

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