LM.Lecture2 - Distributed Operating Systems CS551 Colorado...

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Distributed Operating Systems CS551 Colorado State University at Lockheed-Martin Lecture 2 -- Spring 2001
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31 January 2001 CS-551, Lecture 2 2 CS551: Lecture 2 Topics Interconnection Networks Transparencies Real Time Systems (and networks) Parallel Systems (architecture; software) Kernel of a Distributed Operating System Processes and Threads Interprocess Communication
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31 January 2001 CS-551, Lecture 2 3 Interconnection networks A distributed system : “a collection of autonomous computers linked by a computer network with distributed system software” Coulouris, Dollimore & Kindberg, Distributed Systems: Concepts and Design , 2nd ed., Addison-Wesley (1994). Interconnection network designs bus, crossbar, hypercube, shuffle-exchange
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31 January 2001 CS-551, Lecture 2 4 Figure 1.8 An Interconnection Network in a Multiprocessor. (Galli,p.20)
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31 January 2001 CS-551, Lecture 2 5 Interconnection network: Bus Simple, static Shared by all attached processors No routing required All data transmissions occur on bus Scalability limited by bandwidth Examples: Encore Multimax Sequent Balance and Sequent Symmetry
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31 January 2001 CS-551, Lecture 2 6 Figure 1.9 A Bus Used as an Interconnection Network. (Galli, p.20)
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31 January 2001 CS-551, Lecture 2 7 Interconnection network: Crossbar Permits dynamic configurations n memory modules x x n processors Requires O (n^2) switches (expensive) Many paths from one processor to another
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31 January 2001 CS-551, Lecture 2 8 Figure 1.10 A Crossbar Interconnection Network. (Galli, p.22)
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31 January 2001 CS-551, Lecture 2 9 Interconnection network: Hypercube Static Requires 2^k switches for k processors Each switch is within a processor node Distance between nodes easy to compute
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31 January 2001 CS-551, Lecture 2 10 Figure 1.11 A Hypercube Inter- connection Network of Order 3. (Galli.p.22)
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31 January 2001 CS-551, Lecture 2 11 Interconnection network: Shuffle-Exchange Permits dynamic reconfiguration Switches have four modes of operation controlled by control bits in switch Simple routing address bits used as control bits Examples: Benes, Banyan, Omega, Theta
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31 January 2001 CS-551, Lecture 2 12 Figure 1.12 A 2x2 Switch Box in a Shuffle-Exchange Interconnection Network. (Galli,p.23)
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31 January 2001 CS-551, Lecture 2 13 Figure 1.13 A Perfect Shuffle. (Galli,p.24)
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CS-551, Lecture 2 14 Figure 1.14 A Multistage Shuffle- Exchange Interconnection Network. (Galli,p.24)
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This note was uploaded on 06/12/2011 for the course CS 551 taught by Professor Staff during the Summer '08 term at Colorado State.

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LM.Lecture2 - Distributed Operating Systems CS551 Colorado...

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