HW3soln-2730-F08

HW3soln-2730-F08 - What is the effect of state minimization...

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1 EE 2730 — Homework 3 solutions Fall 2008 1. Brown and Vranesic, Problem 8.3 - Derive the state diagram for an FSM that has an input w and an output z . The machine has to generate z = 1 when the previous four values of w were 1001 or 1111; otherwise, z = 0. Overlapping input patterns are allowed. An example of the desired behavior is w : 010111100110011111 z : 000000100100010011 2. Draw a state diagram from the state machine described by the table below. Next state inputs: ab Present state 00 01 10 11 Output z INIT A0 A0 A1 A1 0 A0 OK0 OK0 A1 A1 0 A1 A0 A0 OK1 OK1 0 OK0 OK0 OK0 OK1 A1 1 OK1 A0 OK0 OK1 OK1 1
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2 3. Brown and Vranesic, Problem 8.7 - Derive the circuits that implement the state tables in Figures 8.51 and 8.52.
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Unformatted text preview: What is the effect of state minimization on the cost of implementation? Next state Present state w = 0 w = 1 Output z A B C 1 B D F 1 C F E 0 D B G 1 E F C 0 F E D 0 G F G 0 Figure 8.51 Next state Present state w = 0 w = 1 Output z A B C 1 B A F 1 C F C 0 F C A 0 Figure 8.52 EE 2730 HW 3 solutions 3 EE 2730 HW 3 solutions 4 4. Brown and Vranesic, Problem 8.9 - A sequential circuit has two inputs w 1 and w 2 , and an output, z . Its function is to compare the input sequences on the two inputs. If w 1 = w 2 during any four consecutive clock cycles, the circuit produces z = 1; otherwise, z = 0. For example w 1 : 0110111000110 w 2 : 1110101000111 z : 0000100001110 Derive a suitable circuit....
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This note was uploaded on 06/20/2011 for the course EE 2730 taught by Professor Desouza during the Spring '08 term at LSU.

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HW3soln-2730-F08 - What is the effect of state minimization...

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