HW2soln-2730-S11

# HW2soln-2730-S11 - EE 2730 HW 2 solutions 1 EE 2730...

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EE 2730 — HW 2 solutions 1 EE 2730 — Homework 2 solutions Spring 2011 1. Each box below contains a 4-bit register with inputs D 3 D 2 D 1 D 0 and outputs Q 3 Q 2 Q 1 Q 0 . Input L is the output of a positive-edge-triggered flip-flop. (a) How does circuit 1 behave when L = 0? When L = 1? (b) How does circuit 2 behave when L = 0? When L = 1? (c) Draw a timing diagram showing a case where the same sequence of clock , L , and D 0 inputs leads to circuit 1 and circuit 2 having different Q 0 outputs. Keep in mind the propagation delay from a positive clock edge to a change in the Q output of a flip-flop. (a) When L = 0, the clock input to the box in circuit 1 is a constant 1, so the output does not change. When L = 1, the clock input to the box in circuit 1 is clock , so it acts like a regular 4-bit register (that is, on a positive clock edge, the D inputs appear at the Q outputs). (b) When L = 0, the clock input to the box in circuit 2 is a constant 0, so the output does not change. When L = 1, the clock input to the box in circuit 2 is

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## This note was uploaded on 06/20/2011 for the course EE 2730 taught by Professor Desouza during the Spring '08 term at LSU.

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HW2soln-2730-S11 - EE 2730 HW 2 solutions 1 EE 2730...

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