ece290HWK #10 Solution (Reg File, ALSU, Mealy to Moore, ASM)

ece290HWK #10 Solution (Reg File, ALSU, Mealy to Moore,...

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Unformatted text preview: HWK #10 Solution Problem 10.1: For this problem, there are two main ways to implement the register fle. The frst, shown below, is to use the EX input to mean that external data should be loaded, with the destination address DA speciying which register to store it to. The other option is to simply declare that either SA1 or SA2 (or both!) being 11 means that external data should be loaded. Here, we chose SA1 (source address 1) as the source address or register transers. a. Again, we choose SA1 to be the source address or register transers. b. Since technically tri-state buers are one-bit components, we need to be able to handle 4 bits at once: We then use this circuit T in our fnal design: c. Mallard Intro to Computer Engineering I - HWK #10 Solution https://mallard2.math.illinois.edu/ECE290/material.cgi?SessionID=bly3_1110416_111633&type=default&title=HWK #10 Solution&bodya... 1 of 5 4/16/11 3:10 PM Problem 10.2: For this part, we can make a table of what we need our ain, bin, and c0 inputs into the FAs to be: S1S0 a* b* c0 00 a b 01 a b' 1 10 a' 1 11 a' b 1 We can get expressions for a*, b*, and c0 by inspection: a* = a S1, b* = b AND (S1 XNOR S0) OR b'S1'S0, and c0 = S1 OR S0. However, there is a trick to b* which makes it a little simpler.S1, b* = b AND (S1 XNOR S0) OR b'S1'S0, and c0 = S1 OR S0....
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This note was uploaded on 06/21/2011 for the course ECE 290 taught by Professor Staff during the Spring '08 term at University of Illinois, Urbana Champaign.

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ece290HWK #10 Solution (Reg File, ALSU, Mealy to Moore,...

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