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ece290HWK #11 Solution (LC3)

# ece290HWK #11 Solution (LC3) - Mallard Intro to Computer...

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HWK #11 Solution Problem 11.1. (a) If overflow does not occur, then the sign bit of the adder result s n -1 is correct. If overflow occurs, then the sign bit of the adder result is incorrect, and the actual sign bit should be its complement, s ' n -1 . We know that c n xor c n -1 = 1 if and only if overflow occurs. So if overflow does not occur, then c n xor c n -1 = 0 , and hence c n xor c n -1 xor s n -1 = s n -1 is the correct sign bit for the actual sum. If overflow occurs, then c n xor c n -1 = 1 , and hence c n xor c n -1 xor s n -1 = s ' n -1 is again the correct sign bit for the actual sum. Thus during addition and subtraction, C should be loaded with the value of c n xor c n -1 xor s n -1 , which will then be shifted into A as the sign bit. Later, because the shifting operations are arithmetic shifts, we should duplicate the sign bit, which is in C, by leaving C unchanged. (b) For the ASM chart, simply replace the parallel adder by an ALU and add a flip-flop labeled Q -1 . During a right-shift, the rightmost bit of Q goes into Q -1 . The value of Q -1 goes into the control unit. (c) Register Microoperation Control Signal Name Boolean Expression Register A A <- 0 Initialize IDLE . G A <- A + B Add MUL0 . Q' 0 . Q -1 A <- A - B Subtract MUL0 . Q 0 . Q' -1 Shift A right Shift_dec MUL1 Register C C <- 0 Initialize C <- c n xor c n -1 xor s n -1 SignIntoC MUL0 . (Q 0 xor Q -1 ) Register Q Shift Q right Shift_dec Register Q -1 Q -1 <- 0 Initialize Q -1 <- Q 0 Shift_dec Counter P P <- n -1 Initialize

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